Is a bad practice make variations on power's tracks width in pcb? The Next CEO of Stack OverflowBypass capacitors needed in low-frequency digital logic systems?VCC trace routing on a two-layer board with TQFP chipPCB and trace design for high-speed TTLReturn current in 8 Layer stackupRouting a buck/boost DC/DC converterProper GND pours for two-layer PCBs?Restrict area trouble in EagleDetails on PCB layout for microcontrollerPCB layout: am I doing local power nets correctly?Choosing the right stackup for 6 or 8 layers
Calculate the Mean mean of two numbers
Prodigo = pro + ago?
My boss doesn't want me to have a side project
What difference does it make matching a word with/without a trailing whitespace?
logical reads on global temp table, but not on session-level temp table
Mathematica command that allows it to read my intentions
Is it okay to majorly distort historical facts while writing a fiction story?
Can you teleport closer to a creature you are Frightened of?
Variance of Monte Carlo integration with importance sampling
Could a dragon use its wings to swim?
What steps are necessary to read a Modern SSD in Medieval Europe?
Calculating discount not working
Cannot restore registry to default in Windows 10?
Is the offspring between a demon and a celestial possible? If so what is it called and is it in a book somewhere?
Small nick on power cord from an electric alarm clock, and copper wiring exposed but intact
How seriously should I take size and weight limits of hand luggage?
How can the PCs determine if an item is a phylactery?
Upgrading From a 9 Speed Sora Derailleur?
Create custom note boxes
Horror film about a man brought out of cryogenic suspension without a soul, around 1990
How to unfasten electrical subpanel attached with ramset
How to implement Comparable so it is consistent with identity-equality
"Eavesdropping" vs "Listen in on"
Would a grinding machine be a simple and workable propulsion system for an interplanetary spacecraft?
Is a bad practice make variations on power's tracks width in pcb?
The Next CEO of Stack OverflowBypass capacitors needed in low-frequency digital logic systems?VCC trace routing on a two-layer board with TQFP chipPCB and trace design for high-speed TTLReturn current in 8 Layer stackupRouting a buck/boost DC/DC converterProper GND pours for two-layer PCBs?Restrict area trouble in EagleDetails on PCB layout for microcontrollerPCB layout: am I doing local power nets correctly?Choosing the right stackup for 6 or 8 layers
$begingroup$
Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
The frequency of the signals are not high , a few units of KHz, something near 10kHz.
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.
pcb-design
$endgroup$
add a comment |
$begingroup$
Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
The frequency of the signals are not high , a few units of KHz, something near 10kHz.
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.
pcb-design
$endgroup$
add a comment |
$begingroup$
Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
The frequency of the signals are not high , a few units of KHz, something near 10kHz.
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.
pcb-design
$endgroup$
Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
The frequency of the signals are not high , a few units of KHz, something near 10kHz.
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.
pcb-design
pcb-design
asked 6 hours ago
DanielDaniel
18510
18510
add a comment |
add a comment |
2 Answers
2
active
oldest
votes
$begingroup$
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.
At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.
It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).
$endgroup$
add a comment |
$begingroup$
I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.
$endgroup$
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
add a comment |
StackExchange.ifUsing("editor", function ()
return StackExchange.using("mathjaxEditing", function ()
StackExchange.MarkdownEditor.creationCallbacks.add(function (editor, postfix)
StackExchange.mathjaxEditing.prepareWmdForMathJax(editor, postfix, [["\$", "\$"]]);
);
);
, "mathjax-editing");
StackExchange.ifUsing("editor", function ()
return StackExchange.using("schematics", function ()
StackExchange.schematics.init();
);
, "cicuitlab");
StackExchange.ready(function()
var channelOptions =
tags: "".split(" "),
id: "135"
;
initTagRenderer("".split(" "), "".split(" "), channelOptions);
StackExchange.using("externalEditor", function()
// Have to fire editor after snippets, if snippets enabled
if (StackExchange.settings.snippets.snippetsEnabled)
StackExchange.using("snippets", function()
createEditor();
);
else
createEditor();
);
function createEditor()
StackExchange.prepareEditor(
heartbeatType: 'answer',
autoActivateHeartbeat: false,
convertImagesToLinks: false,
noModals: true,
showLowRepImageUploadWarning: true,
reputationToPostImages: null,
bindNavPrevention: true,
postfix: "",
imageUploader:
brandingHtml: "Powered by u003ca class="icon-imgur-white" href="https://imgur.com/"u003eu003c/au003e",
contentPolicyHtml: "User contributions licensed under u003ca href="https://creativecommons.org/licenses/by-sa/3.0/"u003ecc by-sa 3.0 with attribution requiredu003c/au003e u003ca href="https://stackoverflow.com/legal/content-policy"u003e(content policy)u003c/au003e",
allowUrls: true
,
onDemand: true,
discardSelector: ".discard-answer"
,immediatelyShowMarkdownHelp:true
);
);
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
StackExchange.ready(
function ()
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2felectronics.stackexchange.com%2fquestions%2f430164%2fis-a-bad-practice-make-variations-on-powers-tracks-width-in-pcb%23new-answer', 'question_page');
);
Post as a guest
Required, but never shown
2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.
At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.
It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).
$endgroup$
add a comment |
$begingroup$
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.
At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.
It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).
$endgroup$
add a comment |
$begingroup$
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.
At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.
It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).
$endgroup$
I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.
At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.
It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).
answered 6 hours ago
The PhotonThe Photon
86.8k398202
86.8k398202
add a comment |
add a comment |
$begingroup$
I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.
$endgroup$
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
add a comment |
$begingroup$
I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.
$endgroup$
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
add a comment |
$begingroup$
I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.
$endgroup$
I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.
answered 6 hours ago
ammar.cmaammar.cma
497312
497312
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
add a comment |
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
$endgroup$
– KingDuken
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
$begingroup$
I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
$endgroup$
– ammar.cma
6 hours ago
add a comment |
Thanks for contributing an answer to Electrical Engineering Stack Exchange!
- Please be sure to answer the question. Provide details and share your research!
But avoid …
- Asking for help, clarification, or responding to other answers.
- Making statements based on opinion; back them up with references or personal experience.
Use MathJax to format equations. MathJax reference.
To learn more, see our tips on writing great answers.
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
StackExchange.ready(
function ()
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2felectronics.stackexchange.com%2fquestions%2f430164%2fis-a-bad-practice-make-variations-on-powers-tracks-width-in-pcb%23new-answer', 'question_page');
);
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Sign up or log in
StackExchange.ready(function ()
StackExchange.helpers.onClickDraftSave('#login-link');
);
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Sign up using Google
Sign up using Facebook
Sign up using Email and Password
Post as a guest
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown
Required, but never shown